1. Field
This application relates generally to data communication and more specifically, but not exclusively, to generating a signal such as a clock signal with adjustable phase and/or frequency, and to generating a signal that tracks another signal.
2. Background
In some applications, a communication system may generate signals where the frequency and the phase of the signals are adjustable to some degree. For example, a typical receiver may use a clock signal to recover data from a received signal. In this case, the frequency and phase of the clock signal may be synchronized to the frequency and phase of the received signal to improve the accuracy with which the data is recovered from the received signal. In addition, some systems may employ multiphase clocks where the different phases may be used at different times and/or for different circuits.
In practice, undesirable trade-offs relating to, for example, complexity, power consumption, and cost may need to be made to provide signals having the desired frequency and phase qualities. As an example, an ultra-wideband communication system may employ very narrow pulses and a high level of duty cycling to reduce the power requirements of associated transceiver components. Here, the effectiveness with which received data is recovered depends, in part, on appropriate tracking of the timing of the received pulses. Due to the use of relatively narrow pulse widths, however, a synchronization and tracking structure that provides a sufficient level of tracking performance may be undesirably complex. For example, in some implementations a synchronization and tracking circuit may comprise a phase lock loop or some form of a voltage controlled oscillator circuit to generate signals with appropriate frequency and/or phase (e.g., different clock phases in a multiphase system). In addition, in some implementations a synchronization and tracking circuit may comprise a high-frequency oscillator and a high-frequency phase locked loop (“PLL”) or delay locked loop (“DLL”). In this case, the operating frequency of the PLL/DLL may be selected so that the PLL/DLL provides sufficient resolution for a tracking and acquisition control signal.
In practice, the above techniques may be relatively complicated and may consume a relatively large amount of power. Consequently, these techniques may be inappropriate for many applications.